 define W 0x0000
 define F 0x0001
 define INDF 0x0000
 define TMR0 0x0001
 define PCL 0x0002
 define STATUS 0x0003
 define FSR 0x0004
 define GPIO 0x0005
 define PCLATH 0x000A
 define INTCON 0x000B
 define PIR1 0x000C
 define TMR1L 0x000E
 define TMR1H 0x000F
 define T1CON 0x0010
 define TMR2 0x0011
 define T2CON 0x0012
 define CCPR1 0x0013
 define CCPR1L 0x0013
 define CCPR1H 0x0014
 define CCP1CON 0x0015
 define WDTCON 0x0018
 define CMCON0 0x0019
 define CMCON1 0x001A
 define ADRESH 0x001E
 define ADCON0 0x001F
 define OPTION_REG 0x0081
 define TRISIO 0x0085
 define PIE1 0x008C
 define PCON 0x008E
 define OSCCON 0x008F
 define OSCTUNE 0x0090
 define PR2 0x0092
 define WPU 0x0095
 define WPUA 0x0095
 define IOC 0x0096
 define IOCA 0x0096
 define VRCON 0x0099
 define EEDAT 0x009A
 define EEDATA 0x009A
 define EEADR 0x009B
 define EECON1 0x009C
 define EECON2 0x009D
 define ADRESL 0x009E
 define ANSEL 0x009F
 define C 0x0000
 define DC 0x0001
 define Z 0x0002
 define NOT_PD 0x0003
 define NOT_TO 0x0004
 define IRP 0x0007
 define RP0 0x0005
 define RP1 0x0006
 define GP0 0x0000
 define GP1 0x0001
 define GP2 0x0002
 define GP3 0x0003
 define GP4 0x0004
 define GP5 0x0005
 define GPIF 0x0000
 define INTF 0x0001
 define T0IF 0x0002
 define GPIE 0x0003
 define INTE 0x0004
 define T0IE 0x0005
 define PEIE 0x0006
 define GIE 0x0007
 define TMR0IF 0x0002
 define TMR0IE 0x0005
 define TMR1IF 0x0000
 define TMR2IF 0x0001
 define OSFIF 0x0002
 define CMIF 0x0003
 define CCP1IF 0x0005
 define ADIF 0x0006
 define EEIF 0x0007
 define T1IF 0x0000
 define T2IF 0x0001
 define TMR1ON 0x0000
 define TMR1CS 0x0001
 define NOT_T1SYNC 0x0002
 define T1OSCEN 0x0003
 define TMR1GE 0x0006
 define T1GINV 0x0007
 define T1CKPS0 0x0004
 define T1CKPS1 0x0005
 define T1GE 0x0006
 define TMR2ON 0x0002
 define T2CKPS0 0x0000
 define T2CKPS1 0x0001
 define TOUTPS0 0x0003
 define TOUTPS1 0x0004
 define TOUTPS2 0x0005
 define TOUTPS3 0x0006
 define CCP1M0 0x0000
 define CCP1M1 0x0001
 define CCP1M2 0x0002
 define CCP1M3 0x0003
 define DC1B0 0x0004
 define DC1B1 0x0005
 define SWDTEN 0x0000
 define WDTPS0 0x0001
 define WDTPS1 0x0002
 define WDTPS2 0x0003
 define WDTPS3 0x0004
 define CIS 0x0003
 define CINV 0x0004
 define COUT 0x0006
 define CM0 0x0000
 define CM1 0x0001
 define CM2 0x0002
 define CMSYNC 0x0000
 define T1GSS 0x0001
 define ADON 0x0000
 define GO_NOT_DONE 0x0001
 define VCFG 0x0006
 define ADFM 0x0007
 define GO 0x0001
 define CHS0 0x0002
 define CHS1 0x0003
 define CHS2 0x0004
 define NOT_DONE 0x0001
 define GO_DONE 0x0001
 define PSA 0x0003
 define T0SE 0x0004
 define T0CS 0x0005
 define INTEDG 0x0006
 define NOT_GPPU 0x0007
 define PS0 0x0000
 define PS1 0x0001
 define PS2 0x0002
 define TRISIO0 0x0000
 define TRISIO1 0x0001
 define TRISIO2 0x0002
 define TRISIO3 0x0003
 define TRISIO4 0x0004
 define TRISIO5 0x0005
 define TMR1IE 0x0000
 define TMR2IE 0x0001
 define OSFIE 0x0002
 define CMIE 0x0003
 define CCP1IE 0x0005
 define ADIE 0x0006
 define EEIE 0x0007
 define T1IE 0x0000
 define T2IE 0x0001
 define NOT_BOD 0x0000
 define NOT_POR 0x0001
 define SBODEN 0x0004
 define ULPWUE 0x0005
 define SCS 0x0000
 define LTS 0x0001
 define HTS 0x0002
 define OSTS 0x0003
 define IRCF0 0x0004
 define IRCF1 0x0005
 define IRCF2 0x0006
 define TUN0 0x0000
 define TUN1 0x0001
 define TUN2 0x0002
 define TUN3 0x0003
 define TUN4 0x0004
 define WPU0 0x0000
 define WPU1 0x0001
 define WPU2 0x0002
 define WPU4 0x0004
 define WPU5 0x0005
 define WPUA0 0x0000
 define WPUA1 0x0001
 define WPUA2 0x0002
 define WPUA4 0x0004
 define WPUA5 0x0005
 define WPU0 0x0000
 define WPU1 0x0001
 define WPU2 0x0002
 define WPU4 0x0004
 define WPU5 0x0005
 define WPUA0 0x0000
 define WPUA1 0x0001
 define WPUA2 0x0002
 define WPUA4 0x0004
 define WPUA5 0x0005
 define IOC0 0x0000
 define IOC1 0x0001
 define IOC2 0x0002
 define IOC3 0x0003
 define IOC4 0x0004
 define IOC5 0x0005
 define IOCA0 0x0000
 define IOCA1 0x0001
 define IOCA2 0x0002
 define IOCA3 0x0003
 define IOCA4 0x0004
 define IOCA5 0x0005
 define IOC0 0x0000
 define IOC1 0x0001
 define IOC2 0x0002
 define IOC3 0x0003
 define IOC4 0x0004
 define IOC5 0x0005
 define IOCA0 0x0000
 define IOCA1 0x0001
 define IOCA2 0x0002
 define IOCA3 0x0003
 define IOCA4 0x0004
 define IOCA5 0x0005
 define VRR 0x0005
 define VREN 0x0007
 define VR0 0x0000
 define VR1 0x0001
 define VR2 0x0002
 define VR3 0x0003
 define RD 0x0000
 define WR 0x0001
 define WREN 0x0002
 define WRERR 0x0003
 define ANS0 0x0000
 define ANS1 0x0001
 define ANS2 0x0002
 define ANS3 0x0003
 define ADCS0 0x0004
 define ADCS1 0x0005
 define ADCS2 0x0006

 define _FOSC_LP 0x3FF8    ; LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
 define _LP_OSC 0x3FF8    ; LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
 define _FOSC_XT 0x3FF9    ; XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT
 define _XT_OSC 0x3FF9    ; XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT
 define _FOSC_HS 0x3FFA    ; HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
 define _HS_OSC 0x3FFA    ; HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
 define _FOSC_EC 0x3FFB    ; EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN
 define _EC_OSC 0x3FFB    ; EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN
 define _FOSC_INTOSCIO 0x3FFC    ; INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
 define _INTOSCIO 0x3FFC    ; INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
 define _INTRC_OSC_NOCLKOUT 0x3FFC    ; INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
 define _FOSC_INTOSCCLK 0x3FFD    ; INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
 define _INTOSC 0x3FFD    ; INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
 define _INTRC_OSC_CLKOUT 0x3FFD    ; INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
 define _FOSC_EXTRCIO 0x3FFE    ; EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin
 define _EXTRCIO 0x3FFE    ; EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin
 define _EXTRC_OSC_NOCLKOUT 0x3FFE    ; EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin
 define _FOSC_EXTRCCLK 0x3FFF    ; EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin
 define _EXTRC 0x3FFF    ; EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin
 define _EXTRC_OSC_CLKOUT 0x3FFF    ; EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin

 define _WDTE_OFF 0x3FF7    ; WDT disabled
 define _WDT_OFF 0x3FF7    ; WDT disabled
 define _WDTE_ON 0x3FFF    ; WDT enabled
 define _WDT_ON 0x3FFF    ; WDT enabled

 define _PWRTE_ON 0x3FEF    ; PWRT enabled
 define _PWRTE_OFF 0x3FFF    ; PWRT disabled

 define _MCLRE_OFF 0x3FDF    ; MCLR pin function is digital input, MCLR internally tied to VDD
 define _MCLRE_ON 0x3FFF    ; MCLR pin function is MCLR

 define _CP_ON 0x3FBF    ; Program memory code protection is enabled
 define _CP_OFF 0x3FFF    ; Program memory code protection is disabled

 define _CPD_ON 0x3F7F    ; Data memory code protection is enabled
 define _CPD_OFF 0x3FFF    ; Data memory code protection is disabled

 define _BOREN_OFF 0x3CFF    ; BOR disabled
 define _BOD_OFF 0x3CFF    ; BOR disabled
 define _BOREN_SBODEN 0x3DFF    ; BOR controlled by SBOREN bit of the PCON register
 define _BOD_SBODEN 0x3DFF    ; BOR controlled by SBOREN bit of the PCON register
 define _BOREN_NSLEEP 0x3EFF    ; BOR enabled during operation and disabled in Sleep
 define _BOD_NSLEEP 0x3EFF    ; BOR enabled during operation and disabled in Sleep
 define _BOREN_ON 0x3FFF    ; BOR enabled
 define _BOD_ON 0x3FFF    ; BOR enabled

 define _IESO_OFF 0x3BFF    ; Internal External Switchover mode is disabled
 define _IESO_ON 0x3FFF    ; Internal External Switchover mode is enabled

 define _FCMEN_OFF 0x37FF    ; Fail-Safe Clock Monitor is disabled
 define _FCMEN_ON 0x3FFF    ; Fail-Safe Clock Monitor is enabled

 define _DEVID1 0x2006

 define _IDLOC0 0x2000
 define _IDLOC1 0x2001
 define _IDLOC2 0x2002
 define _IDLOC3 0x2003
